FI Systems, CorpEfficiency is Everything
← Portable communications and recorders

TASK · FULL COSTS · COOLING

Portable communications and recorders: heat and cooling.

DEFINED TASK / COMPLETE MODEL

D099 · Public-safety radio evidence recorder

Both designs return the same required output fields, encoded response bytes and final state within this defined model. Each job contains 4 useful frames and repeats every 10 ms.

Input energy per job6,933.757861 → 6,931.618701 µJ
Total modeled energy saving0.030851%
Heat saving at the modeled job rate0.213916 mW

Input power: 0.693375786 → 0.69316187 W at 100 jobs/s. ΔQ̇ = (Eordinary − Eselected) / job period, for equal energy leaving in forms other than heat and equal stored-energy change. The input-power model includes the unchanged reference load and shared costs.

Ordinary → selected completion: 5,480.28 → 5,696.97 µs; required deadline 8,000 µs.

The changes included in this design.

The model compares the selected design with the best eligible conventional design in the study. Both include compatible improvements. The energy calculation counts logic, memory, clocks, connections, setup, idle time, resets and recovery once.

Compared designs and full energy breakdown

Selected: H_G7_COMPACT_D5_STREAM_CG::W_SCHEMA_DMA_1B_CG::BODY_POLICY

Strongest ordinary: O_BALANCED_COMPACT_D5_LOOKAHEAD_R4R1_BD32_STREAM_CG::W_SCHEMA_DMA_1B_CG::BODY_POLICY

Prior R6 selected policy: H_G7_COMPACT_D5_STREAM_CG::W_SCHEMA_DMA_1B_CG::BODY_POLICY. Extra saving against that policy: 0 µJ/job.

Input-referred termStrong ordinary (µJ)Selected (µJ)
common common host control W222.222222222.222222
common common memory W55.55555655.555556
common common clock sensor W111.111111111.111111
common plant or external load W5,555.5555565,555.555556
installed FPGA shell888.888889888.888889
generic accelerator clock distribution48.96469650.878791
arithmetic resource leak3.6273561.593578
cache leak00
allocated program data memory leak2.91304420.8654
additional array port capacity tariff2.9130440
occupied CPU units13.44613.408
DSP products00
adder bits0.0031860.003186
nonadder LUT bits0.018460.01846
divider sequence0.0014510.001451
register accesses14.134810.76342
accelerator control0.1385430.02592
internal data instruction cache traffic8.992165.34704
cache valid initialization00
conditional original B core dynamic00
conditional original B clock standby00
external canonical wrapper CPU0.0106670.010667
external request commit readback0.7810.781
cold host preparation00
cold logic program cache preparation00
R6 wrapper logic0.426080.42608
R6 wrapper internal fixed transfers0.0541910.054191
R6 wrapper resource leak0.8636440.863644
R6 wrapper memory leak0.3393890.339389
R6 wrapper extra port leak00
R6 wrapper clock2.7968072.905152
R7 lookahead FIFO additional port00
Total6,933.7578616,931.618701

Exact totals: 124807641503/18000000000000 J versus 124769136623/18000000000000 J. Source models use declared physical coefficients.

Operating conditions, uncertainty and fitting the design into a product

One reference controller/processor, shared memory, sensor/clock rails and the stated unchanged external load; compute-specific increments and added resources are priced by the R5 common cost-law artifact.

Supply efficiency in the model: 90%. Shared loads and loads that stay unchanged: common host control W 0.02 W; common memory W 0.005 W; common clock sensor W 0.01 W; plant or external load W 0.5 W.

  • Runtime-visible event/retention policy and exact required output/raw-review horizon
  • Input byte/arrival traces with events, pre/post-trigger context and metadata format
  • Queue capacity, throughput, timestamps, continuity, wake/stall/retry and recovery semantics
  • Cost placement before a real constrained data edge; exact accepted reduction and ordinary comparator

The portfolio has 13 savings at the main modeled point, 100 ties using the conventional fallback, and 7 unmatched comparisons across 120 references. Positive advantages passing both the strict and combined tighter uncertainty tests: 0.

APPLICATION COVERAGE

The comparison tasks.

Comparison jobInput energy saved per jobJob rateHeat reduction under the stated conditionsOutcome at the main modeled point
D027 · Low-power Wi-Fi client electronics9.052813 µJ100/s0.905281 mWSelected changes costed together
D091 · Passive spectrum-scanning recorder0 µJ100/s0 mWConventional fallback: same energy
D092 · Direction-finding computation0 µJ100/s0 mWConventional fallback: same energy
D093 · Radar receiver processing0 µJ1,000/s0 mWConventional fallback: same energy
D094 · Ionospheric radio measurement0 µJ1/s0 mWConventional fallback: same energy
D095 · GNSS interference monitoring30.327626 µJ10/s0.303276 mWSelected changes costed together
D096 · EMC test-data analysis0 µJ1/s0 mWConventional fallback: same energy
D097 · Wireless coexistence engineering0 µJ10/s0 mWConventional fallback: same energy
D098 · Authorized passive monitoring workstation0 µJ100/s0 mWConventional fallback: same energy
D099 · Public-safety radio evidence recorder2.13916 µJ100/s0.213916 mWSelected changes costed together
D100 · Receiver front-end calibration0 µJ100/s0 mWConventional fallback: same energy

These are computational models of defined tasks relevant to this application. Each selected design includes the compatible changes listed in its comparison.

YOUR PRODUCT’S THERMAL INPUTS

Calculate the cooling mass.

Use the heat carried by this cooling path and the weight of its installed parts, including added hardware. The comparison task’s average power change contributes to that total device calculation.

Chosen model: effective area follows Q = hAΔT; the fixed mass stays, the area-scaled mass changes, and added parts are charged.

Enter the product’s heat-path and part-weight values to calculate the cooling change.

Explore the calculation.

Heat energy = input energy − energy leaving in forms other than heat − change in stored energy.

All 120 reference rows, exact values, complete ledgers and source pins →All product thermal budgets and FI tools →